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Cypress Semiconductor /psoc63 /CSD0 /HSCMP

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Interpret as HSCMP

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OFF)HSCMP_EN 0 (HSCMP_INVERT)HSCMP_INVERT 0 (AZ_EN)AZ_EN

HSCMP_EN=OFF

Description

High Speed Comparator configuration

Fields

HSCMP_EN

High Speed Comparator enable

0 (OFF): Disable comparator, output is zero

1 (ON): On, regular operation. Note that CONFIG.LP_MODE determines the power mode level
HSCMP_INVERT

Invert the HSCMP output before it is used to control switches and the CSD sequencer. This bit does not affect the ADC sequencer or the STATUS.HSCMP_OUT
AZ_EN

Auto-Zero enable, allow the Sequencer to Auto-Zero this component

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data